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Anotace knihy

This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful deductive proof system, and some impressive, realistic case studies. Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure theory and techniques to real applications, and hopefully will be inspired to start to use the proposed approach, or even develop their own formal methods in their future work.

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Zařazení knihy Knihy v angličtině Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Plný název: Formal Verification of Simulink/Stateflow Diagrams
• Autor: Naijun Zhan, Shuling Wang, Hengjun Zhao
• Jazyk: Angličtina
• Vazba: Pevná
• Počet stran: 258
• EAN: 9783319470146
• ISBN: 3319470140
• ID: 14133174
• Nakladatelství: Springer International Publishing AG
• Hmotnost: 5384 g
• Rozměry: 235 × 155 × 20 mm
• Datum vydání: 08. November 2016

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